v64 setup version 0 1 1;

/* config section */

resolution = 500ps;
dev_supply_voltage	=	5.00v;
dev_supply_current	=	1.00a;

term_supply_voltage	=	3.00v;

force_high_family_v1	=	2.40v;
force_low_family_v1	=	0.50v;
compare_family_v1	=	1.40v;

force_high_family_v2	=	4.50v;
force_low_family_v2	=	0.50v;
compare_family_v2	=	2.50v;

sector_logic_family	=	{
	v2, v2, v2, v2, v2, v2, v2, v2, v2, v2, v2, v2,  ,  ,  , 
};


/* group section */

group "DATA1" {
	radix = bin;
	force_fmt = ri;
	compare_fmt = edge_t;
	phase = 1a;
	signal "D0" {
		dut = "72";
		sector = 0h6;
		channel = 0h6;
	}
	signal "D1" {
		dut = "73";
		sector = 0h7;
		channel = 0h0;
	}
	signal "D2" {
		dut = "75";
		sector = 0h7;
		channel = 0h8;
	}
	signal "D3" {
		dut = "76";
		sector = 0h6;
		channel = 0h4;
	}
	signal "D4" {
		dut = "77";
		sector = 0h6;
		channel = 0hf;
	}
	signal "D5" {
		dut = "78";
		sector = 0h6;
		channel = 0h5;
	}
	signal "D6" {
		dut = "79";
		sector = 0h6;
		channel = 0h3;
	}
	signal "D7" {
		dut = "06";
		sector = 0h7;
		channel = 0hc;
	}
}

group "DATA2" {
	radix = bin;
	force_fmt = ri;
	compare_fmt = edge_t;
	phase = 2a;
	signal "D8" {
		dut = "08";
		sector = 0h8;
		channel = 0h1;
	}
	signal "D9" {
		dut = "09";
		sector = 0h8;
		channel = 0h0;
	}
	signal "D10" {
		dut = "10";
		sector = 0h8;
		channel = 0h2;
	}
	signal "D11" {
		dut = "11";
		sector = 0h8;
		channel = 0h7;
	}
	signal "D12" {
		dut = "12";
		sector = 0h8;
		channel = 0h6;
	}
	signal "D13" {
		dut = "13";
		sector = 0h8;
		channel = 0ha;
	}
	signal "D14" {
		dut = "14";
		sector = 0h8;
		channel = 0hb;
	}
	signal "D15" {
		dut = "15";
		sector = 0h8;
		channel = 0hc;
	}
}

group "CONTROL" {
	radix = bin;
	force_fmt = dnrz_l;
	compare_fmt = edge_t;
	phase = 2b;
	signal "RD_WRBAR" {
		dut = "49";
		sector = 0h8;
		channel = 0hd;
	}
	signal "AD6" {
		dut = "36";
		sector = 0h9;
		channel = 0h6;
	}
	signal "AD5" {
		dut = "35";
		sector = 0h9;
		channel = 0hf;
	}
	signal "AD4" {
		dut = "29";
		sector = 0h9;
		channel = 0hd;
	}
	signal "AD3" {
		dut = "30";
		sector = 0ha;
		channel = 0h8;
	}
	signal "AD2" {
		dut = "31";
		sector = 0h9;
		channel = 0h4;
	}
	signal "AD1" {
		dut = "32";
		sector = 0h9;
		channel = 0h5;
	}
	signal "AD0" {
		dut = "34";
		sector = 0ha;
		channel = 0h9;
	}
}

group "REQUEST" {
	radix = bin;
	force_fmt = r0;
	compare_fmt = edge_t;
	phase = 2c;
	signal "REQ" {
		dut = "28";
		sector = 0h9;
		channel = 0he;
	}
}

group "RESETBAR" {
	radix = bin;
	force_fmt = dnrz_l;
	compare_fmt = edge_t;
	phase = 2b;
	signal "RST~" {
		dut = "27";
		sector = 0ha;
		channel = 0h7;
	}
}

group "ACKNOWLEDGE" {
	radix = bin;
	force_fmt = dnrz_l;
	compare_fmt = edge_t;
	phase = 2d;
	signal "ACK" {
		dut = "50";
		sector = 0h8;
		channel = 0he;
	}
}

group "TEST1" {
	radix = bin;
	force_fmt = dnrz_l;
	compare_fmt = edge_t;
	phase = 2d;
	signal "TEST_OE" {
		dut = "52";
		sector = 0h8;
		channel = 0h9;
	}
	signal "TEST_PCDONE" {
		dut = "54";
		sector = 0h8;
		channel = 0h3;
	}
	signal "TEST_RDEN1" {
		dut = "53";
		sector = 0h8;
		channel = 0h8;
	}
	signal "TEST_SEN" {
		dut = "56";
		sector = 0h8;
		channel = 0h4;
	}
	signal "TEST_WRDONE" {
		dut = "55";
		sector = 0h8;
		channel = 0h5;
	}
	signal "TEST_WREN" {
		dut = "51";
		sector = 0h8;
		channel = 0hf;
	}
}

group "TEST2" {
	radix = bin;
	force_fmt = dnrz_l;
	compare_fmt = edge_t;
	phase = 1b;
	signal "TEST_PCG" {
		dut = "58";
		sector = 0h7;
		channel = 0hf;
	}
	signal "TEST_SEL0" {
		dut = "70";
		sector = 0h7;
		channel = 0h9;
	}
	signal "TEST_SEL15" {
		dut = "71";
		sector = 0h7;
		channel = 0h1;
	}
}

/* template section */

template "RESET" {
	cycle = 100ns;
	phase 2a {delay = 0ns; width = 90ns;}
	phase 2b {delay = 0ns; width = 90ns;}
	phase 2c {delay = 86ns; width = 8ns;}
	phase 2d {delay = 0ns; width = 80ns;}
	phase 1a {delay = 0ns; width = 90ns;}
	phase 1b {delay = 0ns; width = 80ns;}
	group "DATA1" {
		function = mask;
	}
	group "DATA2" {
		function = mask;
	}
	group "CONTROL" {
		function = force;
	}
	group "REQUEST" {
		function = force;
	}
	group "RESETBAR" {
		function = force;
	}
	group "ACKNOWLEDGE" {
		function = compare;
	}
	group "TEST1" {
		function = compare;
	}
	group "TEST2" {
		function = compare;
	}
}

template "WRITE" {
	cycle = 200ns;
	phase 2a {delay = 10ns; width = 100ns;}
	phase 2b {delay = 0ns; width = 190ns;}
	phase 2c {delay = 40ns; width = 150ns;}
	phase 2d {delay = 0ns; width = 150ns;}
	phase 1a {delay = 10ns; width = 100ns;}
	phase 1b {delay = 0ns; width = 150ns;}
	group "DATA1" {
		function = force;
	}
	group "DATA2" {
		function = force;
	}
	group "CONTROL" {
		function = force;
	}
	group "REQUEST" {
		function = force;
	}
	group "RESETBAR" {
		function = force;
	}
	group "ACKNOWLEDGE" {
		function = compare;
	}
	group "TEST1" {
		function = compare;
	}
	group "TEST2" {
		function = compare;
	}
}

template "READ" {
	cycle = 200ns;
	phase 2a {delay = 100ns; width = 50ns;}
	phase 2b {delay = 0ns; width = 190ns;}
	phase 2c {delay = 50ns; width = 140ns;}
	phase 2d {delay = 0ns; width = 150ns;}
	phase 1a {delay = 100ns; width = 50ns;}
	phase 1b {delay = 0ns; width = 150ns;}
	group "DATA1" {
		function = compare;
	}
	group "DATA2" {
		function = compare;
	}
	group "CONTROL" {
		function = force;
	}
	group "REQUEST" {
		function = force;
	}
	group "RESETBAR" {
		function = force;
	}
	group "ACKNOWLEDGE" {
		function = compare;
	}
	group "TEST1" {
		function = compare;
	}
	group "TEST2" {
		function = compare;
	}
}

template "WRITECOMPLT" {
	cycle = 200ns;
	phase 2a {delay = 10ns; width = 100ns;}
	phase 2b {delay = 0ns; width = 190ns;}
	phase 2c {delay = 50ns; width = 50ns;}
	phase 2d {delay = 0ns; width = 150ns;}
	phase 1a {delay = 10ns; width = 100ns;}
	phase 1b {delay = 0ns; width = 150ns;}
	group "DATA1" {
		function = force;
	}
	group "DATA2" {
		function = force;
	}
	group "CONTROL" {
		function = force;
	}
	group "REQUEST" {
		function = force;
	}
	group "RESETBAR" {
		function = force;
	}
	group "ACKNOWLEDGE" {
		function = compare;
	}
	group "TEST1" {
		function = compare;
	}
	group "TEST2" {
		function = compare;
	}
}

template "READCOMPLT" {
	cycle = 200ns;
	phase 2a {delay = 50ns; width = 40ns;}
	phase 2b {delay = 0ns; width = 190ns;}
	phase 2c {delay = 50ns; width = 50ns;}
	phase 2d {delay = 0ns; width = 150ns;}
	phase 1a {delay = 50ns; width = 40ns;}
	phase 1b {delay = 0ns; width = 150ns;}
	group "DATA1" {
		function = compare;
	}
	group "DATA2" {
		function = compare;
	}
	group "CONTROL" {
		function = force;
	}
	group "REQUEST" {
		function = force;
	}
	group "RESETBAR" {
		function = force;
	}
	group "ACKNOWLEDGE" {
		function = compare;
	}
	group "TEST1" {
		function = compare;
	}
	group "TEST2" {
		function = compare;
	}
}

/* schmoo define section */

schmoo_var_x = not_selected;
schmoo_var_y = not_selected;

pmu_test "PMU_Test1" {
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
}


pmu_test "PMU_Test2" {
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
}


pmu_test "PMU_Test3" {
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
}


pmu_test "PMU_Test4" {
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
}


pmu_test "PMU_Test5" {
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
	no_test;
}


pmu_schedule {
}

/* macro section */

macro macro_0() {
	*	"";
}

/* define format info */


define_format {
	keymap = lf_cr_addline;
}
/* pattern section */

pattern 
	*	"SIMPLE FIRST SILICON TEST - ZEROS AND ONES";
	*	"THIS TEST WILL WRITE ZEROS READ ZEROS";
        *       "WRITE ONES READ ONES";
        *       "COMMENCE WRITING ZEROS";
	"RESET"	00000000 00000000 00000000 0 0 0 010000 000;
        "WRITECOMPLT"	00000000 00000000 00000000 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00000001 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00000010 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00000011 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00000100 1 1 0 010000 000;
        "WRITECOMPLT"	00000000 00000000 00000101 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00000110 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00000111 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00001000 1 1 0 010000 000;
        "WRITECOMPLT"	00000000 00000000 00001001 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00001010 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00001011 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00001100 1 1 0 010000 000;
        "WRITECOMPLT"	00000000 00000000 00001101 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00001110 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00001111 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00010000 1 1 0 010000 000;
        "WRITECOMPLT"	00000000 00000000 00010001 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00010010 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00010011 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00010100 1 1 0 010000 000;
        "WRITECOMPLT"	00000000 00000000 00010101 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00010110 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00010111 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00011000 1 1 0 010000 000;
        "WRITECOMPLT"	00000000 00000000 00011001 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00011010 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00011011 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00011100 1 1 0 010000 000;
        "WRITECOMPLT"	00000000 00000000 00011101 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00011110 1 1 0 010000 000;  
        "WRITECOMPLT"	00000000 00000000 00011111 1 1 0 010000 000;
        *       "COMMENCE READING ZEROS ";
        "READCOMPLT"	00000000 00000000 10000000 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10000001 1 1 0 010000 000; 
        "READCOMPLT"	00000000 00000000 10000010 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10000011 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10000100 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10000101 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10000110 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10000111 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10001000 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10001001 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10001010 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10001011 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10001100 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10001101 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10001110 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10001111 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10010000 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10010001 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10010010 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10010011 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10010100 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10010101 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10010110 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10010111 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10011000 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10011001 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10011010 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10011011 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10011100 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10011101 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10011110 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10011111 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10100000 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10100001 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10100010 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10100011 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10100100 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10100101 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10100110 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10100111 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10101000 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10101001 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10101010 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10101011 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10101100 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10101101 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10101110 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10101111 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10110000 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10110001 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10110010 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10110011 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10110100 1 1 0 010000 000;
        "READCOMPLT"	00000000 00000000 10110101 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10110110 1 1 0 010000 000;  
        "READCOMPLT"	00000000 00000000 10110111 1 1 0 010000 000;  
        "READCOMPLT"	00000000 000000